Field of the Invention
The invention relates to a semiconductor package structure and a manufacturing method thereof; more particularly, the invention relates to a chip package structure and a manufacturing method thereof.
Description of Related Art
In regard to the wire bonding technology, a lead-frame based design is mostly applied to the low pin-count IC packages. After going through the processes of wafer sawing, die bonding, wire bonding, molding, and trimming/forming, a conventional lead-frame based chip package is substantially completed.
To comply with the trend of lightness, slimness, shortness, and compactness of modern electronic devices, the sizes of chips also tend toward miniaturization accordingly. As the chip size is reduced, the distance between the chip and the inner leads of the lead frame is increased, and the lengths of the bonding wires for electrically connecting the chip to the inner leads of the lead frame have to be lengthened. However, when the lengths and the loop angles of the bonding wires are increased, the bonding wires are likely to collapse causing short circuit, and likely to be broken by the molding compound during molding injection process resulting in open circuit, both of which would reduce the yield rate of the chip packages. Besides, re-fabrication of the molds for producing the lead frames adapted to miniaturized chips would increase the overall production cost.
Furthermore, with the increasing integration density, chips become more and more complicated and multi-functional, and thus heat generated during the operation of the chips keeps increasing. Generally, the heat generated by the chip being dissipated directly through the chip pad has the best heat dissipation effect. Nevertheless, the chip pad and the leads of the conventional lead frame need be completely electrically insulated, and thus the chip pad and the leads should be separated by certain spacing, which poses a limitation to the size of the chip pad. Thus, the heat dissipation area of the chip pad cannot be effectively expanded so that the heat generated by the chip cannot be effectively dissipated, and the heat dissipation efficiency of the chip package structure is reduced.